91 lines
2.4 KiB
Rust
91 lines
2.4 KiB
Rust
const N: i32 = 17;
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const M: i32 = 17;
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const SET_P: usize = 0;
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const OFF_P: usize = 4;
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const SIZE_P: usize = 1;
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const OFFSET: i32 = 0;
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struct Cache {
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tags: [i32;1<<SET_P],
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cnt: i32,
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tot: i32
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}
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#[derive(Debug)]
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struct Addr {
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ct: i32,
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ci: i32,
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co: i32
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}
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fn get_addr(i: i32, j: i32, src: bool) -> Addr {
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let bin = OFFSET + (if src {i * M + j} else {(N + i) * M + j} << SIZE_P);
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Addr {
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ct: bin >> (SET_P + OFF_P),
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ci: (bin >> OFF_P) & ((1 << SET_P) - 1),
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co: bin & ((1 << OFF_P) - 1)
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}
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}
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fn get_src_addr(i: i32, j: i32) -> Addr {
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get_addr(i, j, true)
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}
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fn get_dst_addr(i: i32, j: i32) -> Addr {
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get_addr(i, j, false)
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}
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impl Cache {
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fn simulate(&mut self, addr: &Addr) -> bool {
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self.tot += 1;
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let tag = addr.ct;
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let idx = addr.ci;
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if tag != self.tags[idx as usize] {
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self.tags[idx as usize] = tag;
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self.cnt += 1;
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false
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} else {
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true
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}
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}
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}
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fn main() {
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let mut cache = Cache{ tags: [-1;1<<SET_P], cnt: 0, tot: 0 };
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let deb = 85;
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// for j in 0..M>>1 {
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// for i in 0..N>>1 {
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// let i = i << 1;
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// let j = j << 1;
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// let mut r = [false;4];
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// r[0] = cache.simulate(&get_src_addr(i, j));
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// r[1] = cache.simulate(&get_src_addr(i+1, j));
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// r[2] = cache.simulate(&get_src_addr(i, j+1));
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// r[3] = cache.simulate(&get_src_addr(i+1, j+1));
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// if i == deb {
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// println!("i = {i}, j = {j}, addr = {:?}, missed = {:?}", get_src_addr(i, j), r[0]);
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// println!("i = {i}, j = {}, addr = {:?}, missed = {:?}", j+1, get_src_addr(i, j+1), r[2]);
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// }
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// }
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// }
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for j in 0..4 {
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for i in 0..4 {
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let addr = get_src_addr(i, j);
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cache.simulate(&addr);
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}
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}
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// for i in 0..N {
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// for j in 0..M {
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// let src_addr = get_src_addr(i, j);
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// let dst_addr = get_dst_addr(i, j);
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// let r1 = cache.simulate(&src_addr);
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// let r2 = cache.simulate(&dst_addr);
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// if i == deb {
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// println!("i = {i}, j = {j}, addr = {:?}, missed = {:?}", src_addr, r1);
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// }
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// }
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// }
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let cnt = cache.cnt;
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let tot = cache.tot;
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println!("cnt = {cnt}, tot = {tot}, miss rate = {}", cnt as f64/tot as f64);
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} |